1. Field of the Invention
The present invention is directed in general to the field of semiconductor devices. In one aspect, the present invention relates to the use of plasma processes in the fabrication of integrated circuits.
2. Description of the Related Art
In the manufacture of integrated circuits, plasma processes are often used for deposition or etching of various material layers, including but not limited to plasma-enhanced chemical vapor deposition (PECVD), plasma-based etch and ash processes, and plasma-based implantation processes. While plasma processing offers many advantages to the fabrication of integrated circuits, there can be device damage caused by plasma processing, including deposition and etch processes. This type of problem can occur not only early in the manufacture (e.g., when substrate regions are being implanted), but also in subsequent stages of manufacture (e.g., when metal interconnect layers are being formed). Other plasma-related effects, such as plasma non-uniformity, can also create electric field gradients that lead to device damage. Accordingly, a need exists for an integrated circuit manufacturing process and apparatus which reduce plasma-induced damage in integrated circuit devices. Further limitations and disadvantages of conventional processes and technologies will become apparent to one of skill in the art after reviewing the remainder of the present application with reference to the drawings and detailed description which follow.
It will be appreciated that for simplicity and clarity of illustration, elements illustrated in the drawings have not necessarily been drawn to scale. For example, the dimensions of some of the elements are exaggerated relative to other elements for purposes of promoting and improving clarity and understanding. In addition, the number and relative size of the depicted masking pattern openings shown in the drawings are provided to illustrate the concepts disclosed herein, and it will be appreciated that additional specifics and details are set forth in the detailed description section. Further, where considered appropriate, reference numerals have been repeated among the drawings to represent corresponding or analogous elements.